1. Field of the Invention
The present invention relates to the general field of electromagnetic interference and radiated emissions, and more particularly to electromagnetic and radiated emission reduction techniques.
2. Description of the Related Art
Increasingly, clock distribution has become an important issue in the design of computers, communication devices, and advanced entertainment systems as higher performance features/faster microprocessors are integrated into these systems. These enhancements typically require incorporating higher frequency clock oscillators, as the clock speed is directly proportional to the speed of the microprocessor processing the information. However, devices supporting high speed clock and data paths are susceptible to internal and external radiation problems. For example, computer, telecommunication, and entertainment systems have sensitive audio, video, and graphics circuitries, the performance of which can be affected by internal EMI radiation. Furthermore, excessive internal EMI radiation degrades the quality of video, audio, and graphics, and causes system timing errors. EMI concerns in external devices having high clock and data rates raise FCC (U.S. Federal Communication Commission) compliance issue problems, as these systems and devices often have electromagnetic interference (EMI) requirements.
In general, to keep radiated EMI levels to a desired level, for FCC purposes or internal considerations, computer system designers typically employ techniques such as slowing down the clock, controlling rising and falling edges, utilizing the method of Spread Spectrum Clock Generation (SSCG), and/or shielding. While each of these EMI reduction techniques is effective to varying degrees, each also suffers attendant limitations.
For example, shielding requires the use of expensive conductive material to prevent emitted radiation from leaking outside of the shielded enclosure. This, however, increases heat accumulation inside the computer, which can be exacerbated by reduced airflow or inadequate ventilation.
The other methods, slowing the clock, data rising and falling edges, and SSCG, all result in reductions in the timing margins, in addition to other problems. Reductions of the timing margin are frequently undesirable for high-speed systems for which system timing is critical. Timing requirements of systems implementing SSCG are further limited by the very jitter generated, based upon a frequency modulated analog signal, to reduce the EMI emissions. Moreover, none of these EMI reduction methods is scalable. That is, the EMI reduction cannot be programmed without adversely impacting system timings. Furthermore, none of these methods wholly prevents radiation problems from occurring inside the computer.
Therefore, a method which overcomes these problems would be useful.